System Validation and Verification
This book as published by CRC Press in 1997. It covers these two processes that reduce program risk. Validation is a process for proving that design risks presented by the requirements are minimized before a lot of money has been spent doing the design. Verification is a process for developing evidence that the design solution satisfies the requirements upon which it is based.


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 Catalog #-7838

ISBN 0-8493-7838-9

Nov., 1997, 352 pages